The present invention relates to a semiconductor integrated circuit which incorporates voltage regulators for stepping down the externally-supplied power voltage, and to a technique which is applied effectively to data processing systems, such as portable information terminals, having their semiconductor chips required to be smaller in size and power consumption.
Among semiconductor integrated circuits having internal circuits which operate based on an internal power voltage (Vint: 1.8 V, 1.5 V, etc.) lower than an external power voltage (Vext: 3.3 V, 5.0 V, etc.), there are some integrated circuits having a voltage step-down circuit which steps down an external power voltage to produce an internal power voltage. With the intention of reducing the voltage drop of the internal power voltage caused by the parasitic resistance of wires from the voltage step-down circuit to the internal circuits, there is known a technique of building multiple voltage step-down circuits on the chip and laid near the power pads so that the voltage drop of the external power voltage caused by the parasitic resistance of the wires from the power pads to the voltage step-down circuits is reduced.
Publications pertinent to this technique include Japanese Patent Unexamined Publications No. Hei 9 (1997)-289288 and No. Hei 2 (1990)-224267.